Core reading

See the whole journey first

The processor repeats a cycle with three different jobs:

1. Fetch collects the next instruction from memory.
2. Decode interprets the operation and its operand or operand reference.
3. Execute carries out the operation.

Keep that map visible while following one stable example:

• the Program Counter starts at address 42;
• memory location 42 stores the instruction ADD 100;
• memory location 100 stores the value 7;
• the accumulator starts at 12;
• after execute, the accumulator contains 19;
• the Program Counter is ready with address 43 for the next cycle.

An address tells the processor where to look. The contents are what it finds there. Address 42 is not the instruction, and address 100 is not the number 7.

Fetch: collect the instruction

The Program Counter holds the address of the next instruction. That address is copied to the Memory Address Register, so the memory system knows which location to access.

Memory returns the contents of that location through the Memory Data Register. Here the returned contents are ADD 100. The instruction is copied into the Current Instruction Register, where it remains available to the control unit. The Program Counter is incremented so it points to the next sequential instruction.

The accumulator is still 12. Fetch has not performed the addition.

Decode: interpret the instruction

The control unit interprets ADD 100 as an opcode, ADD, and an operand address, 100. Decode establishes what should happen and which value is needed. It does not yet change the accumulator.

Execute: carry it out

The processor uses address 100 to retrieve the stored value 7. The ALU carries out the addition using the accumulator value 12 and the operand value 7. The result 19 is stored in the accumulator.

The shortest accurate summary is: fetch collects, decode interprets, execute acts.

Different specifications and processor models can describe some low-level transfers differently. Learn the required register roles, information types and stage actions for your selected qualification; do not treat one animation as the only possible physical implementation.